3456 search results - page 518 / 692 » Algorithms for Interface Synthesis |
106
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DSD
2009
IEEE
15 years 9 months ago
2009
IEEE
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
155
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HPDC
2009
IEEE
15 years 9 months ago
2009
IEEE
Long running High Performance Computing (HPC) applications at scale must be able to tolerate inevitable faults if they are to harness current and future HPC systems. Message Passi...
117
Voted
NOSSDAV
2009
Springer
15 years 9 months ago
2009
Springer
Multi-stream/multi-site 3D video collaborative systems are promising as they enable remote users to interact in a 3D virtual space with a sense of co-presence. However, the decent...
132
Voted
ICPP
2008
IEEE
15 years 9 months ago
2008
IEEE
A rising horizon in chip fabrication is the 3D integration technology. It stacks two or more dies vertically with a dense, high-speed interface to increase the device density and ...
113
Voted
IPPS
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper describes the dynamic load-balancing and high performance communication provided in Jcluster, an efficient Java parallel environment. For the efficient loadbalancing,...