Sciweavers

265 search results - page 18 / 53
» Algorithms for Terminal Steiner Trees
Sort
View
ASPDAC
2005
ACM
158views Hardware» more  ASPDAC 2005»
15 years 5 months ago
The polygonal contraction heuristic for rectilinear Steiner tree construction
— Motivated by VLSI/ULSI routing applications, we present a heuristic for rectilinear Steiner minimal tree (RSMT) construction. We transform a rectilinear minimum spanning tree (...
Yin Wang, Xianlong Hong, Tong Jing, Yang Yang, Xia...
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
15 years 8 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
DAM
1999
169views more  DAM 1999»
15 years 3 months ago
Approximating the Weight of Shallow Steiner Trees
This paper deals with the problem of constructing Steiner trees of minimum weight with diameter bounded by d, spanning a given set of vertices in a graph. Exact solutions or logar...
Guy Kortsarz, David Peleg
ICCAD
1997
IEEE
91views Hardware» more  ICCAD 1997»
15 years 7 months ago
Interconnect layout optimization under higher-order RLC model
In this paper, we study the interconnect layout optimization problem under a higher-order RLC model to optimize not just delay, but also waveform for RLC circuits with non-monoton...
Jason Cong, Cheng-Kok Koh
ISAAC
2005
Springer
100views Algorithms» more  ISAAC 2005»
15 years 9 months ago
Hardness and Approximation of Octilinear Steiner Trees
Matthias Müller-Hannemann, Anna Schulze