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ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
14 years 1 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...
APCSAC
2005
IEEE
14 years 1 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi
ICSE
2010
IEEE-ACM
14 years 6 days ago
Adaptive bug isolation
Statistical debugging uses lightweight instrumentation and statistical models to identify program behaviors that are strongly predictive of failure. However, most software is most...
Piramanayagam Arumuga Nainar, Ben Liblit
DAC
2008
ACM
13 years 9 months ago
IntellBatt: towards smarter battery design
Battery lifetime and safety are primary concerns in the design of battery operated systems. Lifetime management is typically supervised by the system via battery-aware task schedu...
Suman Kalyan Mandal, Praveen Bhojwani, Saraju P. M...
JUCS
2002
120views more  JUCS 2002»
13 years 7 months ago
Instance Cooperative Memory to Improve Query Expansion in Information Retrieval Systems
The main goal of this research is to improve Information Retrieval Systems by enabling them to generate search outcomes that are relevant and customized to each specific user. Our ...
Lobna Jeribi, Béatrice Rumpler