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FCCM
1999
IEEE
143views VLSI» more  FCCM 1999»
15 years 8 months ago
Implementation and Evaluation of a Prototype Reconfigurable Router
The evolution of computer networking technology will likely require hardware that is flexible enough to adapt to changing standards while maintaining the highest possible performa...
Jason R. Hess, David C. Lee, Scott J. Harper, Mark...
ARITH
2009
IEEE
15 years 8 months ago
A New Binary Floating-Point Division Algorithm and Its Software Implementation on the ST231 Processor
This paper deals with the design and implementation of low latency software for binary floating-point division with correct rounding to nearest. The approach we present here targe...
Claude-Pierre Jeannerod, Herve Knochel, Christophe...
ICIS
2001
15 years 5 months ago
Knowledge Integration as a Key Problem in an ERP Implementation
Whilepreviousstudieshavefocusedmainlyonthepotentialbenefitsandcriticalsuccessfactorsassociatedwith ERPimplementation,veryfewhaveexploredtheimportantissues of impediments encounter...
Shan Ling Pan, Sue Newell, Jimmy C. Huang, Alvin W...
VLSID
2005
IEEE
158views VLSI» more  VLSID 2005»
16 years 4 months ago
Algorithmic Implementation of Low-Power High Performance FIR Filtering IP Cores
This paper presents two schemes for the implementation of high performance and low power FIR filtering Intellectual Property (IP) cores. Low power is achieved through the utilizat...
C. H. Wang, Ahmet T. Erdogan, Tughrul Arslan
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
15 years 10 months ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...