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» Alternative Test Methods Using IEEE 1149.4
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DATE
2006
IEEE
98views Hardware» more  DATE 2006»
14 years 1 months ago
Power-constrained test scheduling for multi-clock domain SoCs
This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara
DATE
2007
IEEE
77views Hardware» more  DATE 2007»
14 years 2 months ago
Method for reducing jitter in multi-gigahertz ATE
Controlling jitter on a picosecond (or smaller) time scale has become one of the most difficult challenges for testing multi-gigahertz systems. In this paper we present a novel me...
David C. Keezer, Dany Minier, Patrice Ducharme
IWPC
2003
IEEE
14 years 1 months ago
Comprehension of Software Analysis Data Using 3D Visualization
The paper presents a software visualization application-framework that utilizes a variety of 3D metaphors to represent large software system and related analysis data. The 3D repr...
Andrian Marcus, Louis Feng, Jonathan I. Maletic
ISCAS
2008
IEEE
179views Hardware» more  ISCAS 2008»
14 years 2 months ago
Direction of arrival estimation for speech sources using fourth order cross cumulants
— In many applications where speech separation and enhancement is of interest, e.g. conferencing systems, mobile phones and hearing aids, accurate speaker localization is importa...
Mikael Swarding, Benny Sallberg, Nedelko Grbic
DFT
2008
IEEE
182views VLSI» more  DFT 2008»
13 years 9 months ago
Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis
This paper addresses a new threat to the security of integrated circuits (ICs). The migration of IC fabrication to untrusted foundries has made ICs vulnerable to malicious alterat...
Xiaoxiao Wang, Hassan Salmani, Mohammad Tehranipoo...