2451 search results - page 69 / 491 » Alternative Test Methods Using IEEE 1149.4 |
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
Increasing values and spread in leakage current makes it impossible to distinguish between faulty and fault-free chips using single threshold method. Neighboring chips on a wafer ...
EURODAC
1994
IEEE
13 years 12 months ago
1994
IEEE
An approach for stuck-at-i and delay-fault testing of redundant circuits without modifying the logic is proposed. The only requirement is the ability to control both phases of eac...
AICT
2008
IEEE
13 years 8 months ago
2008
IEEE
This paper presents the simplified method of random test suite based on the frequency (block) test. The test is used to check the first property of random numbers which is to have ...
DATE
2000
IEEE
14 years 6 days ago
2000
IEEE
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
ISSRE
2003
IEEE
14 years 1 months ago
2003
IEEE
Use-cases and scenarios have been identified as good inputs to generate test cases and oracles at requirement level. Yet to have an automated generation, information is missing f...