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CEC
2009
IEEE
14 years 2 months ago
Performance assessment of the hybrid Archive-based Micro Genetic Algorithm (AMGA) on the CEC09 test problems
— In this paper, the performance assessment of the hybrid Archive-based Micro Genetic Algorithm (AMGA) on a set of bound-constrained synthetic test problems is reported. The hybr...
Santosh Tiwari, Georges Fadel, Patrick Koch, Kalya...
COMPSAC
2003
IEEE
14 years 1 months ago
A Strategy for Selecting Synchronization Sequences to Test Concurrent Object-Oriented Software
Testing is the most commonly used approach to the assurance of software quality and reliability. The testing of object-oriented software is much more complex than that of conventi...
Huo Yan Chen, Yu Xia Sun, T. H. Tse
ITC
1996
IEEE
96views Hardware» more  ITC 1996»
13 years 12 months ago
Analysis and Detection of Timing Failures in an Experimental Test Chip
A 25k gate Test Chip was designed and manufactured to evaluate different test methods for scan-designed circuits. The design of the chip, the experiment, and preliminary experimen...
Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin...
ICCAD
2005
IEEE
113views Hardware» more  ICCAD 2005»
14 years 4 months ago
Synthesis methodology for built-in at-speed testing
We discuss a new synthesis flow, which offers the ability to do easy delay testing almost free in terms of its impact on speed and area as compared to corresponding implementation...
Yinghua Li, Alex Kondratyev, Robert K. Brayton
ICST
2009
IEEE
14 years 2 months ago
Generating Feasible Transition Paths for Testing from an Extended Finite State Machine (EFSM)
The problem of testing from an extended finite state machine (EFSM) can be expressed in terms of finding suitable paths through the EFSM and then deriving test data to follow the ...
Abdul Salam Kalaji, Robert M. Hierons, Stephen Swi...