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» An Access Timing Measurement Unit of Embedded Memory
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143
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ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
15 years 1 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
157
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TMC
2008
112views more  TMC 2008»
15 years 3 months ago
Throughput Analysis and Measurements in IEEE 802.11 WLANs with TCP and UDP Traffic Flows
There is a vast literature on the throughput analysis of the IEEE 802.11 media access control (MAC) protocol. However, very little has been done on investigating the interplay betw...
Raffaele Bruno, Marco Conti, Enrico Gregori
150
Voted
CODES
2007
IEEE
15 years 10 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
133
Voted
ISCA
1996
IEEE
126views Hardware» more  ISCA 1996»
15 years 7 months ago
Memory Bandwidth Limitations of Future Microprocessors
This paper makes the case that pin bandwidth will be a critical consideration for future microprocessors. We show that many of the techniques used to tolerate growing memory laten...
Doug Burger, James R. Goodman, Alain Kägi
221
Voted
IWMM
2011
Springer
270views Hardware» more  IWMM 2011»
14 years 6 months ago
Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead
Multiprocessors based on processors with multiple cores usually include a non-uniform memory architecture (NUMA); even current 2-processor systems with 8 cores exhibit non-uniform...
Zoltan Majo, Thomas R. Gross