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» An Access Timing Measurement Unit of Embedded Memory
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ICPP
2009
IEEE
15 years 10 months ago
Improving Resource Availability by Relaxing Network Allocation Constraints on Blue Gene/P
— High-end computing (HEC) systems have passed the petaflop barrier and continue to move toward the next frontier of exascale computing. As companies and research institutes con...
Narayan Desai, Darius Buntinas, Daniel Buettner, P...
146
Voted
SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
15 years 9 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft
DC
2008
15 years 3 months ago
Solo-valency and the cost of coordination
This paper introduces solo-valency, a variation on the valency proof technique originated by Fischer, Lynch, and Paterson. The new technique focuses on critical events that influe...
Danny Hendler, Nir Shavit
146
Voted
IEEEPACT
2009
IEEE
15 years 10 months ago
Automatic Tuning of Discrete Fourier Transforms Driven by Analytical Modeling
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
Basilio B. Fraguela, Yevgen Voronenko, Markus P&uu...
IOLTS
2005
IEEE
163views Hardware» more  IOLTS 2005»
15 years 9 months ago
Modeling Soft-Error Susceptibility for IP Blocks
As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These “soft errors” can be a nuisance or catastro...
Robert C. Aitken, Betina Hold