120 search results - page 3 / 24 » An Accurate Interconnection Length Estimation for Computer L... |
DAC
2012
ACM
11 years 11 months ago
2012
ACM
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
VLSID
2005
IEEE
14 years 9 months ago
2005
IEEE
Buffer insertion method plays a great role in modern VLSI design. Many buffer insertion algorithms have been proposed in recent years. However, most of them used simplified delay ...
CASES
2007
ACM
2007
ACM
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
14 years 16 days ago
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
SLIP
2009
ACM
14 years 3 months ago
2009
ACM
An accurate model for pre-placement wire length estimation can be a useful tool during the physical design of integrated circuits. In this paper, an a priori wire length estimatio...
DPD
2010
13 years 6 months ago
2010
Abstract Bloom filters are extensively used in distributed applications, especially in distributed databases and distributed information systems, to reduce network requirements and...