2297 search results - page 371 / 460 » An Algorithm for Computing the Integral Closure |
106
Voted
DAC
2005
ACM
16 years 3 months ago
2005
ACM
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
121
Voted
DAC
2006
ACM
16 years 3 months ago
2006
ACM
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
133
Voted
DAC
2006
ACM
16 years 3 months ago
2006
ACM
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
100
Voted
DAC
2006
ACM
16 years 3 months ago
2006
ACM
Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors i...
147
Voted
DAC
2006
ACM
16 years 3 months ago
2006
ACM
Modern high performance processors employ advanced techniques for thermal management, which rely on accurate readings of on-die thermal sensors. As the importance of thermal effec...