Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips...
The designer needs simple and accurate models to estimate noise in MOS transistors as a function of their size, bias point and technology. In this work, we present a simple, conti...
In order to handle device matching for analog circuits, some pairs of modules need to be placed symmetrically with respect to a common axis. In this paper, we deal with the module...
Trajectory methods sample the state trajectory of a circuit as it simulates in the time domain, and build macromodels by reducing and interpolating among the linearizations create...
– A new approach for diagnostic analysis of static errors in multi-step ADC based on the steepestdescent method is proposed. To set initial data, estimate the parameter update an...