161 search results - page 29 / 33 » An Analysis of Delay Based PUF Implementations on FPGA |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...
DATE
2002
IEEE
14 years 20 days ago
2002
IEEE
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
PPOPP
1993
ACM
13 years 11 months ago
1993
ACM
A vast body of theoretical research has focused either on overly simplistic models of parallel computation, notably the PRAM, or overly specific models that have few representati...
EMSOFT
2006
Springer
13 years 11 months ago
2006
Springer
Recently, a number of frameworks were proposed to extend interface theory to the domains of single-processor and distributed real-time systems. This paper unifies some of these ap...
ISQED
2010
IEEE
13 years 9 months ago
2010
IEEE
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...