161 search results - page 4 / 33 » An Analysis of Delay Based PUF Implementations on FPGA |
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
VLSISP
2002
13 years 7 months ago
2002
Abstract. This paper presents a study of the suitability for FPGA design of full custom based CORDIC implementations. Since all these methods are based on redundant arithmetic, the...
FPGA
2009
ACM
14 years 9 days ago
2009
ACM
This paper presents a new architecture for time-to-digital conversion enabling a time resolution of 17ps over a range of 50ns with a conversion rate of 20MS/s. The proposed archit...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
MIMO (Multi Input Multi Output) wireless communication system is an innovative solution to improve the bandwidth efficiency by exploiting multipath-richness of the propagation envi...
FPGA
2003
ACM
14 years 27 days ago
2003
ACM
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...