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DATE
2002
IEEE
137views Hardware» more  DATE 2002»
14 years 21 days ago
Practical Instruction Set Design and Compiler Retargetability Using Static Resource Models
The design of application (-domain) specific instructionset processors (ASIPs), optimized for code size, has traditionally been accompanied by the necessity to program assembly, ...
Qin Zhao, Bart Mesman, Twan Basten
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
13 years 12 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...
PPDP
1999
Springer
13 years 12 months ago
Constraint Programming in OPL
OPL is a modeling language for mathematical programming and combinatorial optimization problems. It is the rst modeling language to combine high-level algebraic and set notations f...
Pascal Van Hentenryck, Laurent Michel, Laurent Per...
DAC
2006
ACM
14 years 8 months ago
An efficient and versatile scheduling algorithm based on SDC formulation
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
Jason Cong, Zhiru Zhang
LCTRTS
2001
Springer
14 years 5 days ago
A Dynamic Programming Approach to Optimal Integrated Code Generation
Phase-decoupled methods for code generation are the state of the art in compilers for standard processors but generally produce code of poor quality for irregular target architect...
Christoph W. Keßler, Andrzej Bednarski