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ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
14 years 24 days ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
ICSE
2003
IEEE-ACM
14 years 7 months ago
Patterns Approach to Building Software Systems
This position paper suggests an approach for building software systems using patterns, right from business architecture to software architecture. Further, the approach incorporate...
Satish Chandra, Satyendra Bhattaram
VRST
2006
ACM
14 years 1 months ago
Intuitively specifying object dynamics in virtual environments using VR-WISE
Designing and building Virtual Environments is not an easy task, especially when it comes to specifying object behavior where either knowledge about animation techniques or progra...
Bram Pellens, Frederic Kleinermann, Olga De Troyer
EDUTAINMENT
2007
Springer
14 years 1 months ago
Teaching Structured Development of Virtual Reality Systems Using P-VoT
Learning to build and test virtual reality (VR) systems is difficult due to the many required knowledge (e.g. computer graphics, sound processing, simulation, interaction, etc.) an...
Jinseok Seo, Gerard Jounghyun Kim
SIGOPSE
1998
ACM
13 years 12 months ago
MMLite: a highly componentized system architecture
MMLite is a modular system architecture that is suitable for a wide variety of hardware and applications. The system provides a selection of object-based components that are dynam...
Johannes Helander, Alessandro Forin