The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
Data compression algorithms change frequently, and obsolete decoders do not always run on new hardware and operating systems, threatening the long-term usability of content archiv...
This paper proposes a compressive sampling scheme based on random temporal sampling using a successive approximation register (SAR) ADC architecture. Variable wordlength data samp...
Attack resistance has been a critical concern for security-related applications. Various side-channel attacks can be launched to retrieve security information such as encryption k...
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...