710 search results - page 124 / 142 » An Architecture for Exploring Large Design Spaces |
DAC
2004
ACM
14 years 8 months ago
2004
ACM
Instances of the Boolean satisfiability problem (SAT) arise in many areas of circuit design and verification. These instances are typically constructed from some human-designed ar...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Due to skewed scaling of interconnect delay and cell delay with technology scaling, modern VLSI timing closure requires use of extensive buffer insertion. Inserting a large number...
HPCA
1997
IEEE
13 years 12 months ago
1997
IEEE
Fast Ethernet and ATM are two attractive network technologies for interconnecting workstation clusters for parallel and distributed computing. This paper compares network interfac...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
Abstract--This paper focuses on data structures for multicore reachability, which is a key component in model checking algorithms and other verification methods. A cornerstone of a...
GEOINFORMATICA
2008
13 years 7 months ago
2008
Topological relationships like overlap, inside, meet, and disjoint uniquely characterize the relative position between objects in space. For a long time, they have been a focus of...