710 search results - page 29 / 142 » An Architecture for Exploring Large Design Spaces |
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
VLSID
2008
IEEE
14 years 8 months ago
2008
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
ESTIMEDIA
2004
Springer
14 years 1 months ago
2004
Springer
Abstract— This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. O...
VLSID
2008
IEEE
14 years 2 months ago
2008
IEEE
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
ISCAS
2003
IEEE
14 years 29 days ago
2003
IEEE
Rapid evaluation and design space exploration at the algorithmic level are important issues in the design cycle. In this paper we propose an original area vs delay estimation meth...