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CASES
2003
ACM
14 years 1 months ago
Architectural optimizations for low-power, real-time speech recognition
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 2 months ago
Model-based synthesis and optimization of static multi-rate image processing algorithms
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
Joachim Keinert, Hritam Dutta, Frank Hannig, Chris...
ASAP
2008
IEEE
96views Hardware» more  ASAP 2008»
14 years 2 months ago
Integer and floating-point constant multipliers for FPGAs
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimi...
Nicolas Brisebarre, Florent de Dinechin, Jean-Mich...
LCPC
2009
Springer
14 years 10 days ago
MIMD Interpretation on a GPU
Programming heterogeneous parallel computer systems is notoriously difficult, but MIMD models have proven to be portable across multi-core processors, clusters, and massively paral...
Henry G. Dietz, B. Dalton Young
FPL
2009
Springer
82views Hardware» more  FPL 2009»
14 years 12 days ago
Program-driven fine-grained power management for the reconfigurable mesh
The reconfigurable mesh model for massively parallel computing has recently been rediscovered and proposed as the basis of a practical many-core architecture. With this paper, we...
Heiner Giefers, Marco Platzner