30 search results - page 4 / 6 » An Assume-Guarantee Rule for Checking Simulation |
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Recent progress in EDA tools allows IC designs to be accurately verified with consequent improvements in yield and performance through reduced guard bands. This paper will present...
DATE
2004
IEEE
14 years 4 days ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
PARLE
1987
1987
Emulating Digital Logic using Transputer Networks (very High Parallelism = Simplicity = Performance)
13 years 12 months ago
Modern VLSI technology has changed the economic rules by which the balance between processing power, memory and communications is decided in computing systems. This will have a pr...
ICCAD
2010
IEEE
13 years 6 months ago
2010
IEEE
1In this paper, we will present an effective layout method for analog circuits. We consider symmetry constraint, common centroid constraint, device merging and device clustering du...
JIB
2007
13 years 8 months ago
2007
The creation of quantitative, simulatable, Systems Biology Markup Language (SBML) models that accurately simulate the system under study is a time-intensive manual process that re...