70 search results - page 7 / 14 » An Effective Power Management Scheme for RTL Design Based on... |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
WSC
1998
13 years 8 months ago
1998
The Time Warp protocol is considered to be an effective synchronization mechanism for parallel discrete event simulation (PDES). However, it is widely recognized that it suffers o...
ISQED
2010
IEEE
13 years 9 months ago
2010
IEEE
Recent studies have shown that an attacker can retrieve confidential information from cryptographic hardware (e.g. the secret key) by introducing internal faults. A secure and re...
MICRO
2005
IEEE
14 years 29 days ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
CSE
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Today’s wirelessly networked embedded systems underlie a vast array of electronic devices, performing computation, communication, and input/output. A major design goal...