113 search results - page 7 / 23 » An Efficient Two-Level Partitioning Algorithm for VLSI Circu... |
ARVLSI
1995
IEEE
13 years 11 months ago
1995
IEEE
Logic partitioning is an important issue in VLSI CAD, and has been an area of active research for at least the last 25 years. Numerous approaches have been developed and many diff...
FPGA
1995
ACM
13 years 11 months ago
1995
ACM
One of the critical issues for multi-FPGA systems is developing software tools for automatically mapping circuits. In this paper we consider one step in this process, partitioning...
GLVLSI
2010
IEEE
13 years 7 months ago
2010
IEEE
We revisit voltage partitioning problem when the mapped voltages of functional units are predetermined. If energy consumption is estimated by formulation E = CV 2 , a published wo...
GECCO
2003
Springer
14 years 18 days ago
2003
Springer
Abstract. In this paper, we propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local op...
VLSID
2003
IEEE
14 years 7 months ago
2003
IEEE
In this paper we present statistical timing driven hMetisbased partitioning. We approach timing driven partitioning from a different perspective: we use the statistical timing cri...