76 search results - page 5 / 16 » An Elementary Processor Architecture with Simultaneous Instr... |
ISCA
2010
IEEE
13 years 11 months ago
2010
IEEE
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
RTSS
2002
IEEE
14 years 12 days ago
2002
IEEE
Simultaneous multithreading (SMT) improves processor throughput by processing instructions from multiple threads each cycle. This is the first work to explore soft real-time sche...
IPPS
2003
IEEE
14 years 23 days ago
2003
IEEE
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
ICCD
2000
IEEE
13 years 12 months ago
2000
IEEE
The power consumption of microprocessors is becoming increasingly important in design decisions, not only in mobile processors, but also now in high-performance processors. Power-...
ARCS
2010
Springer
14 years 2 months ago
2010
Springer
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...