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ARC
2010
Springer
167views Hardware» more  ARC 2010»
13 years 12 months ago
Systolic Algorithm Mapping for Coarse Grained Reconfigurable Array Architectures
Coarse Grained Reconfigurable Array (CGRA) architectures give high throughput and data reuse for regular algorithms while providing flexibility to execute multiple algorithms on th...
Kunjan Patel, Chris J. Bleakley
EGH
2009
Springer
13 years 6 months ago
Efficient stream compaction on wide SIMD many-core architectures
Stream compaction is a common parallel primitive used to remove unwanted elements in sparse data. This allows highly parallel algorithms to maintain performance over several proce...
Markus Billeter, Ola Olsson, Ulf Assarsson
ADBIS
2004
Springer
153views Database» more  ADBIS 2004»
14 years 2 months ago
Cooperative Transaction Processing between Clients and Servers
Business rules are often implemented as stored procedures in a database server. These procedures are triggered by various clients, but the execution load is fully centralized on th...
Steffen Jurk, Ulf Leser, José-Luis Marzo
DAC
2006
ACM
14 years 9 months ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...
ARVLSI
1999
IEEE
112views VLSI» more  ARVLSI 1999»
14 years 27 days ago
Architectural Considerations for Application-Specific Counterflow Pipelines
Application-specific processor design is a promising approach for meeting the performance and cost goals of a system. Application-specific processors are especially promising for ...
Bruce R. Childers, Jack W. Davidson