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DSD
2006
IEEE
116views Hardware» more  DSD 2006»
14 years 1 months ago
Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard
This paper addresses the implementation of ReedSolomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB...
Arjan C. Dam, Michel G. J. Lammertink, Kenneth C. ...
FPT
2005
IEEE
133views Hardware» more  FPT 2005»
14 years 1 months ago
FPGA-Based Conformance Testing and System Prototyping of an MPEG-4 SA-DCT Hardware Accelerator
Two FPGA implementations of a Shape Adaptive Discrete Cosine Transform (SA-DCT) accelerator are presented in this paper: one PCI-based and the other AMBA-based. The former is used...
Andrew Kinane, Alan Casey, Valentin Muresan, Noel ...
JUCS
2007
114views more  JUCS 2007»
13 years 7 months ago
Design and Implementation of the AMCC Self-Timed Microprocessor in FPGAs
: The development of processors with full custom technology has some disadvantages, such as the time used to design the processors and the cost of the implementation. In this artic...
Susana Ortega-Cisneros, Juan Jóse Raygoza-P...
IPPS
2006
IEEE
14 years 1 months ago
A multiprocessor architecture for the massively parallel model GCA
The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical...
Wolfgang Heenes, Rolf Hoffmann, Johannes Jendrsczo...
FPL
2009
Springer
117views Hardware» more  FPL 2009»
14 years 14 days ago
Data parallel FPGA workloads: Software versus hardware
Commercial soft processors are unable to effectively exploit the data parallelism present in many embedded systems workloads, requiring FPGA designers to exploit it (laboriously) ...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...