1079 search results - page 110 / 216 » An Implementation of an Address Generator Using Hash Memorie... |
JSA
2000
13 years 9 months ago
2000
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
ISCA
2006
IEEE
14 years 3 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
ADC
2008
Springer
14 years 3 months ago
2008
Springer
This article describes how to implement efficient memory resident path indexes for semi-structured data. Two techniques are introduced, and they are shown to be significantly fas...
CAV
2005
Springer
14 years 2 months ago
2005
Springer
Abstract. We address the issue of efficiently automating assume-guarantee reasoning for simulation conformance between finite state systems and specifications. We focus on a non...
DSD
2002
IEEE
14 years 2 months ago
2002
IEEE
This paper1 addresses the hardware implementation of a dynamic scheduler for non-manifest data dependent periodic loops. Static scheduling techniques which are known to give near ...