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MICRO
2007
IEEE
137views Hardware» more  MICRO 2007»
14 years 3 months ago
Implementing Signatures for Transactional Memory
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...
Daniel Sanchez, Luke Yen, Mark D. Hill, Karthikeya...
ICES
2000
Springer
91views Hardware» more  ICES 2000»
14 years 17 days ago
Dynamic Optimisation of Non-linear Feed Forward Circuits
Abstract. An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16-bit address space into an 8-bit one. The target technolog...
Ernesto Damiani, Valentino Liberali, Andrea Tettam...
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
14 years 9 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
ASPLOS
2008
ACM
13 years 11 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
BIOADIT
2006
Springer
14 years 21 days ago
Packet Classification with Evolvable Hardware Hash Functions - An Intrinsic Approach
Bandwidth demands of communication networks are rising permanently. Thus, the requirements to modern routers regarding packet classification are rising accordingly. Conventional al...
Harald Widiger, Ralf Salomon, Dirk Timmermann