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ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 11 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 11 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
SIGMOD
1999
ACM
127views Database» more  SIGMOD 1999»
15 years 10 months ago
An Adaptive Query Execution System for Data Integration
Query processing in data integration occurs over network-bound, autonomous data sources. This requires extensions to traditional optimization and execution techniques for three re...
Zachary G. Ives, Daniela Florescu, Marc Friedman, ...
160
Voted
ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
16 years 2 days ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
175
Voted
EUROMICRO
2009
IEEE
16 years 26 days ago
Foundations for a Model-Driven Integration of Business Services in a Safety-Critical Application Domain
—Current architectures for systems integration provide means for forming agile business processes by manually or dynamically configuring the components. However, a major challeng...
Richard Mordinyi, Thomas Moser, eva Kühn, Ste...