60 search results - page 11 / 12 » An Issue Logic for Superscalar Microprocessors |
ISPASS
2007
IEEE
14 years 1 months ago
2007
IEEE
Semiconductor transient faults (i.e. soft errors) have become an increasingly important threat to microprocessor reliability. Simultaneous multithreaded (SMT) architectures exploi...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper presents a new scheduling technique to improve the speed, power, and scalability of a dynamic scheduler. In a high-performance superscalar processor, the instruction sc...
ISPASS
2005
IEEE
14 years 29 days ago
2005
IEEE
Performance evaluation using only a subset of programs from a benchmark suite is commonplace in computer architecture research. This is especially true during early design space e...
ISCA
2002
IEEE
14 years 9 days ago
2002
IEEE
This paper presents the Alpha EV8 conditional branch predictor. The Alpha EV8 microprocessor project, canceled in June 2001 in a late phase of development, envisioned an aggressiv...
ISCA
2005
IEEE
14 years 29 days ago
2005
IEEE
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...