203 search results - page 4 / 41 » An O(nlogn) time algorithm for optimal buffer insertion |
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Abstract— As technology scales to 0.13 micron and below, designs are requiring buffers to be inserted on interconnects of even moderate length for both critical paths and fixing...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Closed formed expressions for buffered interconnect delay approximation have been around for some time. However, previous approaches assume that buffers are free to be placed anyw...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Most existing buffering algorithms neglect the impact of inductance on circuit performance, which causes large error in circuit analysis and optimization. Even for the approaches...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
A comprehensive probabilistic methodology is proposed to solve the buffer insertion problem with the consideration of process variations. In contrast to a recent work, we point o...