Sciweavers

258 search results - page 45 / 52
» An Optical Simulation of Shared Memory
Sort
View
HPCA
2005
IEEE
14 years 7 months ago
Improving Multiple-CMP Systems Using Token Coherence
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
Michael R. Marty, Jesse D. Bingham, Mark D. Hill, ...
ISCA
2008
IEEE
114views Hardware» more  ISCA 2008»
14 years 1 months ago
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
Jae W. Lee, Man Cheuk Ng, Krste Asanovic
ICC
2007
IEEE
165views Communications» more  ICC 2007»
14 years 1 months ago
Threshold-based Exhaustive Round-Robin for the CICQ Switch with Virtual Crosspoint Queues
A multi-cabinet implementation of a combined input and crosspoint queued (CICQ) switch introduces a large RTT latency between the line cards and switch fabric, requiring a large cr...
Kenji Yoshigoe
IPPS
2007
IEEE
14 years 1 months ago
Optimizing Inter-Nest Data Locality Using Loop Splitting and Reordering
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
Sofiane Naci
WDAG
2005
Springer
90views Algorithms» more  WDAG 2005»
14 years 26 days ago
Proving Atomicity: An Assertional Approach
Atomicity (or linearizability) is a commonly used consistency criterion for distributed services and objects. Although atomic object implementations are abundant, proving that algo...
Gregory Chockler, Nancy A. Lynch, Sayan Mitra, Jos...