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DATE
2000
IEEE
132views Hardware» more  DATE 2000»
13 years 12 months ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
CHI
2005
ACM
14 years 8 months ago
Automatic generation of high coverage usability tests
Software systems are often complex in the number of features that are available through the user interface and consequently, the number of interactions that can occur. Such system...
Renée C. Bryce
SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
14 years 1 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
DAC
1999
ACM
13 years 12 months ago
Test Generation for Gigahertz Processors Using an Automatic Functional Constraint Extractor
As the sizes of general and special purpose processors increase rapidly, generating high quality manufacturing tests which can be run at native speeds is becoming a serious proble...
Raghuram S. Tupuri, Arun Krishnamachary, Jacob A. ...
EDCC
2005
Springer
14 years 1 months ago
PathCrawler: Automatic Generation of Path Tests by Combining Static and Dynamic Analysis
Abstract. We present the PathCrawler prototype tool for the automatic generation of test-cases satisfying the rigorous all-paths criterion, with a user-defined limit on the number...
Nicky Williams, Bruno Marre, Patricia Mouy, Muriel...