Sciweavers

80 search results - page 12 / 16
» An analysis of the effects of miss clustering on the cost of...
Sort
View
PLDI
1995
ACM
13 years 10 months ago
Improving Balanced Scheduling with Compiler Optimizations that Increase Instruction-Level Parallelism
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
Jack L. Lo, Susan J. Eggers
POPL
2007
ACM
14 years 7 months ago
Locality approximation using time
Reuse distance (i.e. LRU stack distance) precisely characterizes program locality and has been a basic tool for memory system research since the 1970s. However, the high cost of m...
Xipeng Shen, Jonathan Shaw, Brian Meeker, Chen Din...
DATE
2010
IEEE
131views Hardware» more  DATE 2010»
13 years 11 months ago
Energy-performance design space exploration in SMT architectures exploiting selective load value predictions
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
Arpad Gellert, Gianluca Palermo, Vittorio Zaccaria...
SIGIR
2002
ACM
13 years 6 months ago
Analysis of papers from twenty-five years of SIGIR conferences: what have we been doing for the last quarter of a century?
mes, abstracts and year of publication of all 853 papers published.1 We then applied Porter stemming and stopword removal to this text, represented terms from the elds with twice t...
Alan F. Smeaton, Gary Keogh, Cathal Gurrin, Kieran...
ISCA
2000
IEEE
91views Hardware» more  ISCA 2000»
13 years 11 months ago
Performance analysis of the Alpha 21264-based Compaq ES40 system
This paper evaluates performance characteristics of the Compaq ES40 shared memory multiprocessor. The ES40 system contains up to four Alpha 21264 CPU’s together with a high-perf...
Zarka Cvetanovic, Richard E. Kessler