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ATS
2009
IEEE
92views Hardware» more  ATS 2009»
13 years 5 months ago
M-IVC: Using Multiple Input Vectors to Minimize Aging-Induced Delay
Negative bias temperature instability (NBTI) has been a significant reliability concern in current digital circuit design due to its effect of increasing the path delay with time a...
Song Jin, Yinhe Han, Lei Zhang 0008, Huawei Li, Xi...
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
14 years 2 months ago
A self-adaptive system architecture to address transistor aging
—As semiconductor manufacturing enters advanced nanometer design paradigm, aging and device wear-out related degradation is becoming a major concern. Negative Bias Temperature In...
Omer Khan, Sandip Kundu
MICRO
2008
IEEE
142views Hardware» more  MICRO 2008»
14 years 1 months ago
NBTI tolerant microarchitecture design in the presence of process variation
—Negative bias temperature instability (NBTI), which reduces the lifetime of PMOS transistors, is becoming a growing reliability concern for sub-micrometer CMOS technologies. Par...
Xin Fu, Tao Li, José A. B. Fortes
ISQED
2010
IEEE
135views Hardware» more  ISQED 2010»
14 years 2 months ago
Signal probability control for relieving NBTI in SRAM cells
—Negative Bias Temperature Instability (NBTI) is one of the major reliability problems in advanced technologies. NBTI causes threshold voltage degradation in a PMOS transistor wh...
Yuji Kunitake, Toshinori Sato, Hiroto Yasuura
DAC
2009
ACM
14 years 8 months ago
Statistical reliability analysis under process variation and aging effects
Circuit reliability is affected by various fabrication-time and run-time effects. Fabrication-induced process variation has significant impact on circuit performance and reliabilit...
Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan...