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» An architectural exploration of via patterned gate arrays
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ISPD
2003
ACM
92views Hardware» more  ISPD 2003»
14 years 4 months ago
An architectural exploration of via patterned gate arrays
Chetan Patel, Anthony Cozzie, Herman Schmit, Lawre...
DAC
2005
ACM
14 years 25 days ago
Exploring technology alternatives for nano-scale FPGA interconnects
Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular. With their regular structures, they are particularly amenable to scaling to smaller technologies. On the ...
Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane I...
ASPDAC
2009
ACM
137views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Reconfigurable double gate carbon nanotube field effect transistor based nanoelectronic architecture
-- Carbon nanotubes (CNTs) and carbon nanotube field effect transistors (CNFETs) have demonstrated extraordinary properties and are widely accepted as the building blocks of next g...
Bao Liu
JSAC
2008
124views more  JSAC 2008»
13 years 11 months ago
Design Tradeoffs and Hardware Architecture for Real-Time Iterative MIMO Detection using Sphere Decoding and LDPC Coding
Abstract-- We explore the performance and hardware complexity tradeoffs associated with performing iterative multipleinput multiple-output (MIMO) detection using a sphere decoder a...
Hyungjin Kim, Dong-U Lee, John D. Villasenor
ISCAS
2003
IEEE
112views Hardware» more  ISCAS 2003»
14 years 4 months ago
Architectures for function evaluation on FPGAs
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
Nalin Sidahao, George A. Constantinides, Peter Y. ...