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» An efficient FIR filter architecture
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PATMOS
2007
Springer
14 years 1 months ago
Switching Activity Reduction of MAC-Based FIR Filters with Correlated Input Data
In this work we consider coefficient reordering for low power realization of FIR filters on fixed-point multiply-accumulate (MAC) based architectures, such as DSP processors. Com...
Oscar Gustafsson, Saeeid Tahmasbi Oskuii, Kenny Jo...
ISLPED
2000
ACM
111views Hardware» more  ISLPED 2000»
13 years 11 months ago
Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
Khurram Muhammad, Robert B. Staszewski, Poras T. B...
ICIP
2009
IEEE
14 years 8 months ago
Lcd Motion Blur Reduction Using Fir Filter Banks
Due to the sample-and-hold nature of Liquid Crystal Display (LCD) image formation, LCDs suffer from motion picture blur. This is especially evident during scenes containing fast m...
TVLSI
2002
58views more  TVLSI 2002»
13 years 7 months ago
A new 2-D systolic digital filter architecture without global broadcast
Abstract--In this paper, we propose two-dimensional (2-D) systolic-array infinite-impulse response (IIR) and finite-impulse response (FIR) digital filter architectures without glob...
L.-D. Van
ICCAD
2000
IEEE
148views Hardware» more  ICCAD 2000»
13 years 11 months ago
FIR Filter Synthesis Algorithms for Minimizing the Delay and the Number of Adders
—As the complexity of digital filters is dominated by the number of multiplications, many works have focused on minimizing the complexity of multiplier blocks that compute the co...
Hyeong-Ju Kang, Hansoo Kim, In-Cheol Park