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ASPDAC
2004
ACM
129views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Instruction buffering exploration for low energy VLIWs with instruction clusters
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
Tom Vander Aa, Murali Jayapala, Francisco Barat, G...
CODES
2006
IEEE
13 years 9 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
DAC
2004
ACM
14 years 8 months ago
Data compression for improving SPM behavior
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all ho...
Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, G...
KBSE
2005
IEEE
14 years 1 months ago
Testing in resource constrained execution environments
Software for resource constrained embedded devices is often implemented in the Java programming language because the Java compiler and virtual machine provide enhanced safety, por...
Gregory M. Kapfhammer, Mary Lou Soffa, Daniel Moss...
CAV
2000
Springer
125views Hardware» more  CAV 2000»
13 years 11 months ago
Efficient Reachability Analysis of Hierarchical Reactive Machines
Hierarchical state machines is a popular visual formalism for software specifications. To apply automated analysis to such specifications, the traditional approach is to compile th...
Rajeev Alur, Radu Grosu, Michael McDougall