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ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
14 years 1 months ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
FC
1997
Springer
86views Cryptology» more  FC 1997»
13 years 11 months ago
The SPEED Cipher
Abstract. SPEED is a private key block cipher. It supports three variable parameters: (1) data length — the length of a plaintext/ciphertext of SPEED can be 64, 128 or 256 bits. ...
Yuliang Zheng
ACSC
2002
IEEE
14 years 11 days ago
Intelligent Agents for Automated One-to-Many e-Commerce Negotiation
Negotiation is a process in which two or more parties with different criteria, constraints, and preferences, jointly reach an agreement on the terms of a transaction. Many current...
Iyad Rahwan, Ryszard Kowalczyk, H. H. Pham
DEEC
2006
IEEE
14 years 1 months ago
BestChoice: A Decision Support System for Supplier Selection in e-Marketplaces
A growing number of companies are outsourcing their purchasing processes to independent purchasing agencies. These agencies now have to process an ever increasing number of purchas...
Dongjoo Lee, Taehee Lee, Suekyung Lee, Ok-Ran Jeon...
CODES
1996
IEEE
13 years 11 months ago
Partitioning and Exploration Strategies in the TOSCA Co-Design Flow
The TaSCA environment for hardware/software co-design of control dominated systems implemented on a single chip includes a novel approach to the system exploration phase for the e...
Alessandro Balboni, William Fornaciari, Donatella ...