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ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
14 years 29 days ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
DAC
2007
ACM
14 years 8 months ago
Design Methodology for Pipelined Heterogeneous Multiprocessor System
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
Seng Lin Shee, Sri Parameswaran
HPCA
2005
IEEE
14 years 7 months ago
Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors
Dynamic voltage and frequency scaling (DVFS) is a widely-used method for energy-efficient computing. In this paper, we present a new intra-task online DVFS scheme for multiple clo...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas...
CIKM
2001
Springer
13 years 12 months ago
PowerDB-IR - Information Retrieval on Top of a Database Cluster
Our current concern is a scalable infrastructure for information retrieval (IR) with up-to-date retrieval results in the presence of frequent, continuous updates. Timely processin...
Torsten Grabs, Klemens Böhm, Hans-Jörg S...
ICS
2004
Tsinghua U.
14 years 23 days ago
EXPERT: expedited simulation exploiting program behavior repetition
Studying program behavior is a central component in architectural designs. In this paper, we study and exploit one aspect of program behavior, the behavior repetition, to expedite...
Wei Liu, Michael C. Huang