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MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
14 years 1 months ago
Scalable Hardware Memory Disambiguation for High ILP Processors
This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...
Simha Sethumadhavan, Rajagopalan Desikan, Doug Bur...
RTAS
2003
IEEE
14 years 1 months ago
Collaborative Operating System and Compiler Power Management for Real-Time Applications
Managing energy consumption has become vitally important to battery operated portable and embedded systems. A dynamic voltage scaling (DVS) technique reduces the processor’s dyn...
Nevine AbouGhazaleh, Daniel Mossé, Bruce R....
SAINT
2003
IEEE
14 years 1 months ago
A Generalized Target-Driven Cache Replacement Policy for Mobile Environments
Caching frequently accessed data items on the client side is an effective technique to improve the system performance in wireless networks. Due to cache size limitations, cache re...
Liangzhong Yin, Guohong Cao, Ying Cai
AOSD
2003
ACM
14 years 1 months ago
Quantifying aspects in middleware platforms
Middleware technologies such as Web Services, CORBA and DCOM have been very successful in solving distributed computing problems for a large family of application domains. As midd...
Charles Zhang, Hans-Arno Jacobsen
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
14 years 1 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
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