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» An evolutionary approach to timing driven FPGA placement
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ASPDAC
2006
ACM
134views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Constraint driven I/O planning and placement for chip-package co-design
System-on-chip and system-in-package result in increased number of I/O cells and complicated constraints for both chip designs and package designs. This renders the traditional ma...
Jinjun Xiong, Yiu-Chung Wong, Egino Sarto, Lei He
DAGSTUHL
2006
13 years 9 months ago
Pre-Routed FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...
Douglas L. Maskell, Timothy F. Oliver
DAC
2004
ACM
14 years 8 months ago
An approach to placement-coupled logic replication
We present a set of techniques for placement-coupled, timingdriven logic replication. Two components are at the core of the approach. First is an algorithm for optimal timingdrive...
Milos Hrkic, John Lillis, Giancarlo Beraudo
ISAS
2007
Springer
14 years 1 months ago
MDDPro: Model-Driven Dependability Provisioning in Enterprise Distributed Real-Time and Embedded Systems
Service oriented architecture (SOA) design principles are increasingly being adopted to develop distributed real-time and embedded (DRE) systems, such as avionics mission computin...
Sumant Tambe, Jaiganesh Balasubramanian, Aniruddha...
TVLSI
2011
265views more  TVLSI 2011»
13 years 2 months ago
Decoding-Aware Compression of FPGA Bitstreams
Abstract—Bitstream compression is important in reconfigurable system design since it reduces the bitstream size and the memory requirement. It also improves the communication ba...
Xiaoke Qin, Chetan Muthry, Prabhat Mishra