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» An improvement in formal verification

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GLVLSI
2000
IEEE

83views VLSI» more GLVLSI 2000»

Formal hardware verification by integrating HOL and MDG

14 years 2 months ago

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V. K. Pisini, Sofiène Tahar, Paul Curzon, O...

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DATE
2010
IEEE

168views Hardware» more DATE 2010»

Formal verification of analog circuits in the presence of noise and process variation

14 years 2 months ago

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We model and verify analog designs in the presence of noise and process variation using an automated theorem prover, MetiTarski. Due to the statistical nature of noise, we propose ...

Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zak...

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GLVLSI
1999
IEEE

81views VLSI» more GLVLSI 1999»

A Hierarchical Approach to the Formal Verification of Embedded Systems Using MDGs

14 years 2 months ago

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Subhashini Balakrishnan, Sofiène Tahar

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GLVLSI
1999
IEEE

90views VLSI» more GLVLSI 1999»

Formal Verification of Tree-Structured Carry-Lookahead Adders

14 years 2 months ago

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Sae Hwan Kim, Shiu-Kai Chin

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ASIAN
1999
Springer

89views Algorithms» more ASIAN 1999»

Formal Verification of the MCS List-Based Queuing Lock

14 years 2 months ago

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