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» An improvement in formal verification
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FORTE
2009
13 years 9 months ago
Approximated Context-Sensitive Analysis for Parameterized Verification
Abstract. We propose a verification method for parameterized systems with global conditions. The method is based on context-sensitive constraints, a symbolic representation of infi...
Parosh Aziz Abdulla, Giorgio Delzanno, Ahmed Rezin...
EUROMICRO
2004
IEEE
14 years 2 months ago
Formally Designing Web Services for Mobile Team Collaboration
We illustrate a symbiotic relationship between existing model oriented specification techniques and web services. Through the formal re-design of a platform for mobile team collab...
Schahram Dustdar, Pascal Fenkam
CAISE
2006
Springer
14 years 1 months ago
An attempt to combine UML and formal methods to model airport security
The EDEMOI project aims to model standards that regulate airport security. It involves the production of a UML model, to support the validation activity, and a formal model for ver...
Yves Ledru, Régine Laleau, Michel Lemoine, ...
ISCAS
2003
IEEE
89views Hardware» more  ISCAS 2003»
14 years 4 months ago
Synthesizing checkers for on-line verification of System-on-Chip designs
In modern System-on-Chip (SoC) designs verification becomes the major bottleneck. Since by using state-of-theart techniques complete designs cannot be fully formally verified, it ...
Rolf Drechsler
DATE
2004
IEEE
147views Hardware» more  DATE 2004»
14 years 2 months ago
Formal Refinement and Model Checking of an Echo Cancellation Unit
This article presents an approach, which combines theorem proving-based refinement with model checking for state based real-time systems. Our verification flow starts from UML sta...
Alexander Krupp, Wolfgang Müller 0003, Ian Ol...