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DATE
2006
IEEE
140views Hardware» more  DATE 2006»
14 years 1 months ago
Optimization of regular expression pattern matching circuits on FPGA
Regular expressions are widely used in Network Intrusion Detection System (NIDS) to represent patterns of network attacks. Since traditional software-only NIDS cannot catch up to ...
Cheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang,...
ICCAD
1998
IEEE
105views Hardware» more  ICCAD 1998»
14 years 5 days ago
Fanout optimization under a submicron transistor-level delay model
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
Pasquale Cocchini, Massoud Pedram, Gianluca Piccin...
ISQED
2006
IEEE
78views Hardware» more  ISQED 2006»
14 years 1 months ago
Simultaneous Statistical Delay and Slew Optimization for Interconnect Pipelines
Process variation has become a major concern in the design of many nanometer circuits, including interconnect pipelines. This paper develops closed-form models to predict the dela...
Andrew Havlir, David Z. Pan
GLVLSI
2007
IEEE
186views VLSI» more  GLVLSI 2007»
13 years 8 months ago
Block placement to ensure channel routability
Given a set of placed blocks, we present an algorithm that minimally spaces the blocks to ensure routability under several assumptions. By performing a binary search on total widt...
Shigetoshi Nakatake, Zohreh Karimi, Taraneh Taghav...
CVPR
2010
IEEE
14 years 4 months ago
3D Shape Correspondence by Isometry-Driven Greedy Optimization
We present an automatic method that establishes 3D correspondence between isometric shapes. Our goal is to find an optimal correspondence between two given (nearly) isometric sha...
Yusuf Sahillioglu, Yucel Yemez