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DAC
2009
ACM
14 years 8 months ago
Handling complexities in modern large-scale mixed-size placement
In this paper, we propose an effective algorithm flow to handle largescale mixed-size placement. The basic idea is to use floorplanning to guide the placement of objects at the gl...
Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
ICCAD
1995
IEEE
163views Hardware» more  ICCAD 1995»
13 years 11 months ago
Signal integrity optimization on the pad assignment for high-speed VLSI design
Pad assignment with signal integrity optimization is very important for high-speed VLSI design. In this paper, an efficient method is proposed to effectively minimize both simulta...
Kai-Yuan Chao, D. F. Wong
DAC
2006
ACM
14 years 8 months ago
Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming
In this paper, we propose an exact algorithm for the problem of area optimization under a delay constraint in the synthesis of multiplierless FIR filters. To the best of our knowl...
Eduardo A. C. da Costa, José Monteiro, Leve...
GLVLSI
2003
IEEE
134views VLSI» more  GLVLSI 2003»
14 years 1 months ago
Modeling QCA for area minimization in logic synthesis
Concerned by the wall that Moore’s Law is expected to hit in the next decade, the integrated circuit community is turning to emerging nanotechnologies for continued device impro...
Nadine Gergel, Shana Craft, John Lach
VLSID
1999
IEEE
97views VLSI» more  VLSID 1999»
14 years 4 days ago
Improving Area Efficiency of Residue Number System based Implementation of DSP Algorithms
Residue Number System based applications involve modulo-arithmetic which is typically implemented using look-up-tables (LUTs) for a small value of modulus. In this paper, we prese...
M. N. Mahesh, Satrajit Gupta, Mahesh Mehendale