Sciweavers

117 search results - page 16 / 24
» An optimal algorithm for sizing sequential circuits for indu...
Sort
View
ICCAD
1998
IEEE
105views Hardware» more  ICCAD 1998»
13 years 11 months ago
Fanout optimization under a submicron transistor-level delay model
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
Pasquale Cocchini, Massoud Pedram, Gianluca Piccin...
PDCN
2004
13 years 8 months ago
Scalable parallel algorithms for difficult combinatorial problems: A case study in optimization
A novel combination of emergent algorithmic methods, powerful computational platforms and supporting infrastructure is described. These complementary tools and technologies are us...
Faisal N. Abu-Khzam, Michael A. Langston, Pushkar ...
EAAI
2006
189views more  EAAI 2006»
13 years 7 months ago
Evolutionary algorithms for VLSI multi-objective netlist partitioning
The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI ...
Sadiq M. Sait, Aiman H. El-Maleh, Raslan H. Al-Aba...
DAC
2006
ACM
14 years 8 months ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 4 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...