3120 search results - page 589 / 624 » An optimal architecture for a DDC |
LPNMR
2009
Springer
2009
Springer
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
14 years 4 months ago
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
MOBICOM
2009
ACM
14 years 4 months ago
2009
ACM
The coexistence of two unlicensed links is considered, where one link interferes with the transmission of the other, over a timevarying, block-fading channel. In the absence of fa...
COMSWARE
2008
IEEE
14 years 4 months ago
2008
IEEE
— The telecom and the internet world is converging towards all-IP network architecture and the operators are keen to provide innovative multimedia services coupled with advanced ...
GLVLSI
2007
IEEE
14 years 4 months ago
2007
IEEE
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
CHES
2007
Springer
14 years 4 months ago
2007
Springer
Abstract. This paper discusses the state-of-the-art fast software implementation of block ciphers on Intel’s new microprocessor Core2, particularly concentrating on “bitslice i...