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EMSOFT
2006
Springer
13 years 10 months ago
Compiler-assisted leakage energy optimization for clustered VLIW architectures
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
Rahul Nagpal, Y. N. Srikant
CASES
2007
ACM
13 years 10 months ago
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems
Recently dual-port SDRAM (DPSDRAM) architecture tailored for dual-processor based mobile embedded systems has been announced where a single memory chip plays the role of the local...
Hoeseok Yang, Sungchan Kim, Hae-woo Park, Jinwoo K...
EH
2004
IEEE
117views Hardware» more  EH 2004»
13 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
DNA
2006
Springer
130views Bioinformatics» more  DNA 2006»
13 years 8 months ago
Displacement Whiplash PCR: Optimized Architecture and Experimental Validation
Whiplash PCR-based methods of biomolecular computation (BMC), while highly-versatile in principle, are well-known to suffer from a simple but serious form of self-poisoning known a...
John A. Rose, Ken Komiya, Satsuki Yaegashi, Masami...
FPGA
1999
ACM
155views FPGA» more  FPGA 1999»
13 years 11 months ago
FPGA Routing Architecture: Segmentation and Buffering to Optimize Speed and Density
In this work we investigate the routing architecture of FPGAs, focusing primarily on determining the best distribution of routing segment lengths and the best mix of pass transist...
Vaughn Betz, Jonathan Rose