This paper describes a fast-lock mixed-mode delaylocked loop (MMDLL) for wide-range operation and multiphase outputs. The architecture of the proposed DLL uses the mixed-mode time...
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....
- The resources available on a chip continue to grow, following Moore's Law. However, the major process by which the benefits of Moore's Law accrue, which is the continui...
Traditional High Performance Computing systems require extensive management and suffer from security and configuration problems. This paper presents a new clustermanagement syste...
Despite a rapid decrease in the price of solid state memory devices, system memory is still a very precious resource in embedded systems. The use of shared libraries is known to b...